Analog Layout Design Engineer

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  • Cisco
  • Armenia,
  • Full-Time
  • 7 days ago
Published
May 9, 2026
Location
Armenia, United Kingdom
Category
None  
Job Type

Analog Layout Design Engineer: our view in 3 lines...

  • The Role: Design and optimize analog integrated circuit layouts for advanced semiconductor products as part of an Analog IC Design team.
  • The Person: Translate schematics into detailed analog IC layouts, perform DRC and LVS checks, optimize layouts for noise, matching and power, and support tape-outs for advanced process nodes.
  • Requirements: Proficiency in Cadence Virtuoso and Calibre DRC/LVS, 3+ years' experience in Analog layout design, Electronics Practical Engineer certificate or Bachelor's degree in Electrical Engineering, and fluency in English.

Job Description

This is a hybrid role with four days per week at Cisco’s Yerevan office.

Meet the Team

Join our innovative Analog IC Design team, a dynamic group of engineers dedicated to pushing the boundaries of semiconductor technology. Our work is crucial for developing the foundational analog blocks that power Cisco's next-generation products, directly impacting our ability to deliver high-performance and reliable solutions to our customers. Comprising experienced layout and circuit designers, our team fosters a collaborative and energetic environment where new ideas are encouraged, and collective problem-solving is key. You'll be at the forefront of creating cutting-edge analog circuits for advanced technology nodes, contributing to products that shape the future of connectivity.

Your Impact

Design and optimize analog integrated circuit layouts to meet stringent performance, area, and manufacturability requirements. Collaborate closely with circuit designers to translate complex schematics into efficient physical layouts, ensuring compliance with design rules, methodologies, and reliability standards while minimizing parasitic effects. Create detailed analog IC layouts following industry best practices and perform rigorous design rule checks (DRC) and layout versus schematic (LVS) verifications. Optimize layouts for critical factors such as noise reduction, matching, and power efficiency to enhance overall circuit performance. Support tape-outs on the most advanced manufacturing processes by proactively addressing and resolving layout-related issues, ensuring successful product realization.

Minimum Qualifications

  • Electronics Practical Engineer certificate or Bachelor's degree in Electrical Engineering or any related field.

  • 3+ years' experience in Analog layout design.

  • Proficiency in layout tools such as Cadence Virtuoso and Calibre DRC/LVS or similar industry-standard tools.

  • Fluency both spoken and written English.

Preferred Qualifications

  • Experience in advanced technology nodes like 5nm and below.

  • Strong understanding of analog circuit design and semiconductor device physics,

  • Proven expertise in layout matching and shielding techniques, with experience in noise-sensitive designs and a solid understanding of ESD protection structures.

Why Cisco? 

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. 

We are Cisco, and our power starts with you. 

Key Skills
? Key Skills in dark blue have been inferred based on similar industry roles
Cadence Virtuoso Calibre DRC/LVS Analog IC Layout DRC/LVS Verification Layout Matching And Shielding ESD Protection Structures Advanced Process Nodes (e.g. 5nm) SOLID

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