- NVIDIA
- Israel, South District
- Full-Time
- 49 days ago
Senior Networking IC Test Engineering Program Manager.
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Senior Networking IC Test Engineering Program Manager: our view in 3 lines...
- The Role:This role is for an experienced program manager overseeing release planning and test readiness for networking IC test programs.
- The Person:The person will own release planning, dashboarding, TRD mapping, readiness planning, release gates, and cross-functional coordination for networking IC test programs.
- Requirements:The ideal candidate has a strong technical background in semiconductor test engineering, product engineering, validation, or TE program development, plus a bachelor's degree or equivalent experience and 5+ years' experience.
About the role
The Networking IC Test Engineering Program Manager will own the technical release planning and execution infrastructure for test programs across all Networking products. The role will drive NPI test readiness, TRD (Test Readiness Dependencies) to test mapping, release dashboarding, fuse approval tracking, ASIC availability coordination, and convergence between test platforms. This person should have enough technical depth to identify real engineering risks, not only schedule delays, and should create the structure that allows test engineers to focus on test content, quality, coverage, and debug.
What you'll be doing:
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Own IC ATE test program release planning across NVIDIA Networking products, including milestones, dependencies, risks, and release criteria.
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Build and maintain a test program release dashboard covering readiness, blockers, release status, TRD mapping, coverage gaps, and ownership.
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Define and drive the Test Engineering readiness plan for NPI products from early development through production release.
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Coordinate TRD mapping to test content, ensuring requirements are tracked, covered, reviewed, and reflected in release decisions.
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Create the operating model for test program releases, including release gates, checklist ownership, approval flow, and escalation paths.
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Partner closely with test engineers, product engineering, silicon/platform teams, operations, and release stakeholders to identify technical risks early and structure resolution plans.
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Standardize release documentation, training materials, handoff packages, and post-release lessons learned, and align communication across Confluence pages and stakeholder updates.
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Improve visibility and efficiency so test engineers can spend more time on test quality, coverage, debug, and optimization.
What we need to see:
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Strong technical background in semiconductor test engineering, product engineering, validation, or TE program development.
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Bachelors degree or equivalent experience.
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5+ years' experience with NPI execution, production release processes, test readiness, or silicon bring-up flows.
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Familiarity with test program structure, test limits, coverage, characterization, release criteria, and manufacturing constraints.
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Program management skills: planning, dependency tracking, risk management, stakeholder alignment, and execution discipline.
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Ability to translate technical engineering status into clear release decisions, dashboards, and management-level communication.
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Strong ownership mindset; able to drive structure in ambiguous, cross-functional environments.
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Excellent communication skills, including Confluence documentation, dashboard definition, and training material creation.
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Proven Leadership / Managerial / Program management experience
