- Bengaluru, KA
- Full-Time
- 24 days ago
Physical Design and Implementation Engineer, CPU.
Before you go
Before you leave us, sign up for our email alerts
We don't do job spam, just the best digital jobs delivered straight to your inbox.
Physical Design and Implementation Engineer, CPU: our view in 3 lines...
- The Role:This role is for an experienced physical design engineer working on custom CPU silicon for Google’s hardware products.
- The Person:The person will develop ASIC RTL2GDS implementation for high PPA designs and manage block and full-chip physical implementation and QoR for power, timing, and area.
- Requirements:The ideal candidate has a bachelor’s degree in Electrical Engineering or Computer Science, 8 years of experience in physical design engineering, experience managing high performance design schema utilizing CPU or GPU, and power optimization techniques.
About the role
Minimum qualifications:
- Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience.
- 8 years of experience in physical design engineering.
- Experience in managing high performance design schema utilizing CPU or GPU.
Preferred qualifications:
- Master's degree in Electrical Engineering or Computer Science, or equivalent practical experience.
- Experience with power optimization techniques.
About the job:
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities:
- Develop all aspects of ASIC RTL2GDS implementation for high Power, Performance, and Area (PPA) designs.
- Manage block and full-chip level physical implementation and Quality of Results (QoR) (power, timing, area).

